VHDL Compiler vs Logic-Gate-Design Uso & Estadísticas
Write VHDL code directly on your iPhone, iPad and iPod Touch! This app is ideal for learning and testing code snippets!
VHDL (VHSIC Hardware Description Language) is a hardware description language used in electronic design automation to describe digital and mixed-signal systems such as field-programmable gate arrays and integrated circuits. VHDL can also be used as a general purpose parallel programming language.
This app uses the open-source GHDL simulator (http://ghdl.free.fr). GHDL is a VHDL compiler that can execute (nearly) any VHDL program. GHDL is not a synthesis tool: you cannot create a netlist with GHDL (yet).
Features:
- Compile and run your program
- View program output or detailed error
- Custom keyboard for easy input of frequently used characters
- Optimized for connecting with external physical/bluetooth keyboard
- Advanced source code editor with syntax highlighting and line numbers
- Open, save, import and share VHDL files.
Limitations:
- Internet connection is required for compilation
- Maximum program running time is 20s
- One file can be run at a time
- All entities should be have the same name as their files.
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The LogicGateDesign is a feature rich app designed by an engineer.
This app allows the creative smart people like you to design, draw, analyse and simplify logic gate networks.
You can draw logic gate networks and share it with others.
You can generate truth table and find simplified/minimized boolean expression that represents the network.
You can optimize and reverse engineer a boolean expression to draw a ladder logic diagram.
It performs both forward engineering (boolean expression to logic circuit) and reverse engineering (logic circuit to boolean expression).
There can be multiple groups of network and each group can have multiple outputs. Truth table is generated for all the outputs.
You can simplify a boolean expression, and find the truth table and share it.
Show truth table along with different types of boolean expression (simplified, Sum-of-products, Product-of-sums)
The simplified expressions also gives you the number of gates required.
You also get the alternate expressions for the same output with the gates required for that.
You can generate a truth table, simplified boolean expression using input-output waveforms.
You can generate a output waveforms, simplified boolean expression using truth table and input waveforms.
You can generate a grey codes and grey code encoder wheel and share it.
Do you have a truth table for your network and want to find the simplified/minimized boolean expression? This app has you covered.
You can simulate your network by changing one input at a time or toggeling all inputs at once.
This app generates beautiful diagrams (logic gate diagram or waveform diagram) that you can share with others or save it locally.
It automatically saves your hard work locally on your device so you can come back and pick up from where you left off as your great effort will not be lost.
There is also a page to help you study. This study tab teaches you some very important boolean algebra theorems.
This is a perfect app for a creative smart individual like you.
This is an app for all student groups. From high school to college to university students.
Be creative. Enjoy the app!
- App Store de Apple
- Gratis
- Educación
Clasificación de tiendas
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VHDL Compiler VS. 
Logic-Gate-Design19iciembre d, 2024